Work

Partitioning-based standard-cell global placement with an exact objective

Year: 1997

Type: conference-paper

Abstract: We present a nexv top-down quadrisection-based global placer for standard-cell layout.The key contribution is a new general gain update scheme for partitioning that can exactly capture detailed placement objectives on a per-net basis.We use this gain update scheme, along with an efficient multilevel partitioner, as the basis for a new quadrisection-based placer called QUAD.Even though QUAD is a global placer, it can achieve significant improve ments in wirelength and congestion distribution over GOR-DIAN-L/DOMINO[SDJSI] [DJS94] (a leading quadratic placer with linear wirelength objective and detailed placement improvement).QUAD can be easily extended to capture various practical considerations; our timing-driven placement can obtain wirelength savings (as well as small cycle time improvements) versus the SPEED [RE95].1.

Source: ACM International Symposium on Physical Design (ISPD)

DOI: 10.1145/267665.267674

Authors: Dennis J.-H. Huang, Andrew B. Kahng

Institutions: University of California, Los Angeles, Cadence Design Systems (United States)

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: bronze

OpenAlex ID: W2007249115

FWCI: 32.09

Cites: 26

Cited by: 139

Related to: 10