Design of a Coarse-Grained Processing Element for Matrix Multiplication on FPGA
Year: 2014
Type: conference-paper
Authors: Yuichi Okuyama, Shigeyuki Takano, Tokimasa Shirai
Institutions: University of Aizu, ON Semiconductor (Japan), NTT DATA NJK (Japan)
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W2016130050
