A fast locking and low jitter delay-locked loop using DHDL
Year: 2003
Type: article
Authors: Hsiang-Hui Chang, Jyh-Woei Lin, Shen-Iuan Liu
Institution: National Taiwan University
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W2018125224