Work

Apply high-level synthesis design and verification methodology on floating-point unit implementation

Year: 2014

Type: conference-paper

Source: International Symposium on VLSI Design, Automation and Test

DOI: 10.1109/vlsi-dat.2014.6834921

Authors: Chia-I Chen, Chin-Yeh Yu, Yen-Ju Lu, Chi-Feng Wu

Institution: Realtek (Taiwan)

Language: English

Topic: Embedded Systems Design Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2020667491

FWCI: 0.211

Cites: 6

Cited by: 3

Related to: 10