Work

Implementation of clock gating technique and performing power analysis for processor engine (ALU) in network processors

Year: 2014

Type: conference-paper

Source: International Conference on Electronics and Communication Systems (ICECS)

DOI: 10.1109/ecs.2014.6892770

Authors: Roopa Kulkarni, S. Y. Kulkarni

Institutions: KLS Gogte Institute of Technology, Ramaiah Institute of Technology

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2072390380

FWCI: 0.802

Cites: 7

Cited by: 4

Related to: 10