A background interstage gain calibration for a 16-bit pipelined ADC
Year: 2009
Type: conference-paper
Authors: Liu Puxia, Lu Tiejun, Wang Zongmin
Institution: Beijing Microelectronics Technology Institute
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W2129065664
