Work

Design of 1.28-GB/s high bandwidth 2-Mb SRAM for integrated memory array processor applications

Year: 1995

Type: article

Source: IEEE Journal of Solid-State Circuits

DOI: 10.1109/4.387066

Authors: T. Kimura, K. Nakamura, Y. Aimoto, T. Manabe, N. Yamashita, Y. Fujita, S. Okazaki, M. Yamashina

Institution: NEC (Japan)

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2129459494

FWCI: 0.464

Cites: 6

Cited by: 6

Related to: 10