An EPR4 read/write channel with digital timing recovery
Year: 1998
Type: article
DOI: 10.1109/4.726588
Authors: G.D. Vishakhadatta, R. Croman, M. Goldenber, J.P. Hein, P. Katikaneni, D. Kuai, C. Lee, I.C. Tesu, R. Trujillo, Ligang Zhan, K. Anderson, R. Behrens, W. Bliss, Li Du, T. Dudley, G. Feyh, W. Foland, M. Kastner, Qingfen Li, J. Mitchem, D. Reed, Sian She, M. Spurbeck, L. Sundell, Hoai Tran, Maoxin Wei, C. Zook
Institution: Cirrus Logic (United States)
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W2145897396
