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An 800-MHz embedded DRAM with a concurrent refresh mode

Year: 2005

Type: article

Source: IEEE Journal of Solid-State Circuits

DOI: 10.1109/jssc.2005.848019

Authors: T. Kirihata, P. Parries, D.R. Hanson, Hoki Kim, J. Golz, G. Fredeman, R. Rajeevakumar, J. Griesemer, N. Robson, A. Cestero, B.A. Khan, Geng Wang, M. Wordeman, S.S. Iyer

Institution: IBM (United States)

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2159253302

FWCI: 4.918

Cites: 21

Cited by: 50

Related to: 10