Work

A delay model allowing nano-CMOS standard cells statistical simulation at the logic level

Year: 2011

Type: conference-paper

Source: Conference on Ph.D. Research in Microelectronics and Electronics

DOI: 10.1109/prime.2011.5966256

Authors: Antonio Mastrandrea, Francesco Menichelli, Mauro Olivieri

Institution: Sapienza University of Rome

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2201250958

FWCI: 1.695

Cites: 8

Cited by: 8

Related to: 10