Year: 2015
Type: conference-paper
Abstract: Copper pillars topped with solder microbumps are emerging as a standard flip-chip solder bump replacement in the semiconductor assembly industry. The relentless drive towards finer pitch, combined with reduced copper pillar height, makes aqueous cleaning of flip-chip flux residues more difficult. An emergent failure mode is joint damage and subsequent yield loss during aqueous jet impingement. The move towards semiconductor grade ultralow residue no-clean fluxes and away from cleaning processes is therefore inevitable for both flip-chip and MEMS applications to meet industry roadmap challenges. The low residue also optimizes underfill adhesion and decreases possible outgassing during underfill cure. This paper discusses the variety of new and emerging failure modes for new packing processes using thinned die with copper-pillar/microbumps. The testing of assembly materials for this purpose will also be discussed.
DOI: 10.4071/2015dpc-wp22
Authors: Maria Durham, SzePei Lim, Jason Chou, Andy Mackie
Institution: Indium Corporation (United States)
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: bronze
OpenAlex ID: W2292394499