VLSI Implementation of High Speed-Low Power-Area Efficient Multiplier Using Modified Vedic Mathematical Techniques
Year: 2017
Type: article
Authors: Abdul Kareem, Vardhana M., Praveen Kumar
Institution: Sahyadri College of Engineering & Management
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W2582947976