Hardware Reduction for Lut–Based Mealy FSMs
Work
Year: 2018
Type: article
Abstract: A method is proposed targeting a decrease in the number of LUTs in circuits of FPGA-based Mealy FSMs. The method improves hardware consumption for Mealy FSMs with the encoding of collections of outpu... more
Institution University of Zielona Góra
Cites: 32
Cited by: 39
Related to: 10
FWCI: 10.93
Open Access status: gold
APC paid (est): $1,100