Work

UCOMIPSIM 2.0: Pipelined MIPS Architecture Simulator

Year: 2018

Type: conference-paper

Abstract: The objective of this work is the realization of an application in JAVA whose function will be to simulate the MIPS 32-bit architecture in pipelined computer with hardwired control unit, in order to help in the learning and understanding of this architecture by the students in Computer Architecture subjects. With it, students will be able to graphically visualize the datapath of multiple MIPS instructions passing through the different stages of the pipelined computer.

Source: Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica (TAEE)

DOI: 10.1109/taee.2018.8476063

Authors: Andres Gersnoviez, Maria Brox, Miguel A. Montijano, Juan A. Sujar, Carlos D. Moreno

Institution: University of Córdoba

Language: English

Topic: Experimental Learning in Engineering

Subfield: Education

Field: Social Sciences

Domain: Social Sciences

SDG: Quality education

Open Access status: green

OpenAlex ID: W2898060403