Year: 2020
Type: article
Abstract: Nowadays minimizing the area and power has become the most significant part of the advanced technologies.One such technology is System on Chip where all the electronic components are placed in one integrated circuit.System on Chip uses more on-chip communication systems.These communication systems are un-suitable for most complex systems.To achieve higher performance in SoCs, a new approach was introduced.Network on chip (NoC) is one such advance where communication between processors is transferred by using packets.NoC includes virtual channels to improve the performance of the NoC System.When there are multiple transactions, they share the same physical layer and each virtual channel needs a first-in, first-out (FIFO) and every virtual channel is not used every time, so there is no effective utilization.This leads to complexity in software.Hence in this study, an NoC linked list based router for packet classification application is introduced where the transactions needs to be restored within the time frame.The functionality of the design is verified and simulated by writing Verilog codes in ModelSim-Altera 10.1b (Quartus 2 12.1).
Author: Kavya K
Institution: B.M.S. College of Engineering
Language: English
Subfield: Computer Networks and Communications
Field: Computer Science
Domain: Physical Sciences
Open Access status: hybrid
OpenAlex ID: W3043072014