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Design of Hardware Acceleration System Based on FPGA and Deep Learning Algorithm

Year: 2020

Type: conference-paper

Source: IEEE International Conference on Artificial Intelligence and Computer Applications (ICAICA)

DOI: 10.1109/icaica50127.2020.9182658

Authors: Yingying Chi, Zhe Zheng, Rui Liu, Wenpeng Cui

Language: English

Topic: Embedded Systems Design Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W3082525489

FWCI: 0.328

Cites: 8

Cited by: 4

Related to: 10