Ferroelectric transistors with asymmetric double gate for memory window exceeding 12 V and disturb-free read
Year: 2021
Type: article
Source: Nanoscale
DOI: 10.1039/d1nr05107e
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W3200367387
