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Partial Response Detectionによるメモリ-プロセッサ間の低消費電力高速信号伝送方式

Year: 1997

Type: article

Source: 電子情報通信学会技術研究報告. ICD, 集積回路

Authors: 美寿斎藤, 泰孝田村, 公太郎後藤, 繁俊若山, 淳二小川, 好治加藤, 眞男田口, 健今村

Language: Japanese

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W355694392

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