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Efficient Computation of the Worst-Delay Corner
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Year:
2007
Type:
conference-paper
Source:
Design, Automation, and Test in Europe
DOI:
10.1109/date.2007.364533
Authors:
Luis Guerra e Silva,
L. Miguel Silveira,
Joel R. Phillips
Institutions:
Instituto de Engenharia de Sistemas e Computadores Investigação e Desenvolvimento,
Cadence Design Systems (United States)
Language:
English
Topic:
Low-power high-performance VLSI design
Subfield:
Electrical and Electronic Engineering
Field:
Engineering
Domain:
Physical Sciences
Open Access status:
closed
OpenAlex ID:
W4248062893
FWCI:
1.005
Cites:
9
Cited by:
18
Related to:
10