Work

FastPass: Fast timing path search for generalized timing exception handling

Year: 2018

Type: conference-paper

Source: Asia and South Pacific Design Automation Conference (ASP-DAC)

DOI: 10.1109/aspdac.2018.8297301

Authors: Pei-Yu Lee, Iris Hui-Ru Jiang, Tung-Chieh Chen

Institutions: National Yang Ming Chiao Tung University, National Taiwan University

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4248769596

FWCI: 4.003

Cites: 12

Cited by: 15

Related to: 10