FPGA implementation of high performance digital FIR filter design using a hybrid adder and multiplier
Year: 2022
Type: article
Authors: V. Thamizharasan, N. Kasthuri
Institution: Sengunthar Engineering College (Autonomous)
Language: English
Subfield: Signal Processing
Field: Computer Science
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W4284672882