Year: 2022
Type: article
Abstract: This paper presents a curvature-compensated sub-1V voltage reference (VR) and a shared-resistive nanoampere current reference (CR) in a 130nm CMOS process. The CR is used to generate a bipolar junction transistor complementary-to-absolute-temperature voltage, which is summed up with a proportional-to-absolute-temperature voltage generated using a summing network of PMOS gate-coupled pairs. The measured output voltage and current references from 10 chips ($V_{\mathrm {REF}}$and$I_{\mathrm {REF}}$) at room temperature are 469mV and 1.86nA, respectively. The measured average temperature coefficient of$V_{\mathrm {REF}}$and$I_{\mathrm {REF}}$are 29ppm$/^{\circ} \text{C}$and 822ppm$/^{\circ} \text{C}$over a temperature range from$- 40^{\circ} \text{C}$to$120^{\circ} \text{C}$. The minimum supply voltage of the voltage-current reference is 0.95V, and the total power consumption is 30nW.
Language: English
Subfield: Biomedical Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: hybrid
Estimated APC paid: $2,195
OpenAlex ID: W4312904656
