Year: 2024
Type: article
Abstract: This research is concerned with applying a reconfigurable system for the hardware realization of digital filters.In particular, it rightly questions whether Field-Programmable Gate Arrays (FPGAs) can be effectively used to implement digital Impulse Infinte Response (IIR) filters.Taking direct, cascaded, and parallel structures of IIR filters with standard and retiming techniques as examples to explore some classifications.The application being investigated most closely is electrocardiogram (ECG) signal processing within an FPGA platform.Using the Simulink environment, a digital IIR band-pass filter is designed and simulated within the MATLAB environment.The filter shows commendable performance in heart signal detection within ECG signals.These IIR filter structures can be hardware-implemented by using the Xilinx System Generator (XSG) tool.The target device here is a member of the Artix 7 family, the XC7A100t-1CSG324 FPGA device.Comprehensive hardware utilization metrics, including the number of slices, look-up tables, peak memory usage, and maximum operating frequency, are extracted from the compilation report during this process.The study uses standard and retiming techniques to optimize the efficiency of FPGA-based IIR filter implementations.Thus it provides insight into whether such filters are suitable for real-time ECG signal processing applications.
DOI: 10.18280/jesa.570228
Language: English
Subfield: Signal Processing
Field: Computer Science
Domain: Physical Sciences
Open Access status: hybrid
OpenAlex ID: W4395955652