Work

FPGA Implementation of Systolic Array Architecture for Matrix Multiplication

Year: 2024

Type: conference-paper

Source: Lecture notes in networks and systems

DOI: 10.1007/978-981-97-6684-0_5

Authors: Rajeshwari Mattimani, Saroja V. Siddamal, H. M . Vijay, Suhas Shirol

Institution: KLE Technological University

Language: English

Topic: Embedded Systems Design Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4405820060

FWCI: 0.677

Cites: 7

Cited by: 3

Related to: 10