Work

Enhancing VLSI Design Efficiency With ML ‐Based C‐ ANN : Performance Optimization of Gate‐Stacked Ferroelectric FE ‐ MOSFETs for High‐Speed and RF Applications

Year: 2025

Type: article

Source: International Journal of Numerical Modelling Electronic Networks Devices and Fields

DOI: 10.1002/jnm.70064

Authors: Abhay Pratap Singh, Vibhuti Chauhan, R. K. Baghel, Sukeshni Tirkey

Institutions: Maulana Azad National Institute of Technology, National Institute of Technology Raipur

Language: English

Topic: Ferroelectric and Negative Capacitance Devices

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4411223908

FWCI: 1.576

Cites: 41

Cited by: 7

Related to: 10