Low-Power Audio Codec Design: DSP Perspective on Power-Computing Power Trade-Offs
Year: 2025
Type: conference-paper
Abstract: Given the strict power constraints inherent to portable audio devices, a portable audio decoding device is designed in this work, with the design process involving a comparative analysis of the performance of diverse DSP technologies based on power consumption, real-time capability, and size. Hardware devices cannot simultaneously optimize static and dynamic power consumption. Power consumption can be divided into static power consumption and dynamic power consumption. With the progress of the manufacturing process, static power consumption is particularly significant, so the research core focuses on optimizing static power consumption. There are many conflicting competitions in the modern process of DSP chip design. Mainstream advanced audio-specific DSP design cases are analyzed, and improvement suggestions for commercial DSP design are proposed. Insights into the future development direction of DSPs are also provided, with a focus on the impact of static power consumption and optimized storage system power consumption on multiplication accumulators, arithmetic logic units, and dedicated operation modules. Through software and hardware analysis, especially the analysis of hardware static power consumption, optimized design solutions were raised under different performance indicators.
Authors: Xin Xie, Jingyu Qian, Han Zheng, Yuhao Luo
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: hybrid
OpenAlex ID: W7203661613