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Thermal and Noise Coupling Optimisation in 3D Integrated Circuits using Advanced Dielectric-based TSV Structures

Year: 2026
Type: conference-paper
Abstract: Nonetheless, due to interconnect delays and increased power density, scaling has been constrained by using the 2D design. The constraints of 2D design have resulted in an increased demand for 3D integrated circuit technology (3D IC). 3D IC is the technology used in stacking devices to minimize interconnects, increase bandwidth, and efficiency in general. Consequently, there is an increased awareness about 3D IC as the future technology. Nevertheless, thermal management remains an important factor due to some associated problems. One such issue is overheating caused by the vertical stacking of active devices, which leads to thermal hotspots and limits performance and reliability. This challenge is addressed by using TTSVs (Thermal Through-Silicon Vias) and ETSVs (Electrical Through-Silicon Vias). In this study, the application of novel dielectric liners SiO2, Benzocyclobutene (BCB), Perylene-N, and Teflon in improving TSVs is examined. Notably, Teflon emerges as the most promising material owing to its low dielectric constant, excellent thermal stability, and relatively higher thermal conductivity, thus facilitating effective heat dissipation and noise isolation in 3D ICs. The suggested design of 3D IC is analyzed based on ITRS standards using ETSVs and TTSVs with the operating frequency of 10 GHz and 1 THz. The analysis of noise coupling is performed by analyzing the effect of dielectrics and TSVs. In addition, further investigation on the comparative structure of ETSV and TTSV structures shows that, at 10 GHz, the comparison of SiO2and BCB results to better noise-coupling results.
Language: English
Open Access status: hybrid
OpenAlex ID: W7204094037
FWCI:
Cites: 24
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Related to: 10