A Test-to-Field Visual Degradation Profiling Framework for In-Service Automotive Power Semiconductor Devices Using Data-Driven and Stress Mapping: A Case Study on SGT MOSFETs
Year: 2026
Type: article
Abstract: A unified and visual degradation profiling capability is increasingly required for in-service power semiconductor devices to support reliability assessment, margin evaluation, and remaining useful life (RUL) planning. This paper proposes a test-to-field visual degradation profiling framework, demonstrated through a case study on shielded gate trench (SGT) MOSFETs, which bridges reliability test data and real application operating conditions via stress mapping and data-driven modeling. First, time-series parameter datasets collected from device reliability tests are used to train a lightweight back-propagation (BP) neural network that learns the mapping from stress-condition vectors and time to multi-parameter electrical degradation trajectories. Second, a stress mapping methodology is developed to transform in-service operating conditions into equivalent reliability test conditions, including Arrhenius temperature acceleration, humidity acceleration, and voltage-stress exponential models, with optional multiplicative or weighted-sum stress fusion. Third, the framework is realized as a PC-based software profiler for degradation visualization and margin evaluation. A controller-level accelerated aging experiment is conducted on a total of 12 devices under test (DUTs) across two automotive fan controllers to verify the proposed workflow. Using the developed stress-time mapping methodology (504 h accelerated test yielded a nominal engineering-equivalent time estimate of approximately 35,100 h under the stated assumptions), the predicted degradation trends of key electrical parameters are consistent with the measured pre- and post-stress shifts, with quantified prediction errors. These results demonstrate the practicality and feasibility of the proposed framework for in-service degradation visualization. The current validation is limited to a single SGT MOSFET type (100 V / 1.6 m $\Omega $ / 240 A) under a representative operating condition. The proposed framework is intended as a proof-of-concept, and its extension to additional device types, mission profiles, and degradation indicators will be addressed in future work.
Source: IEEE Access
Authors: Xiao Zeng, Tiancen Liu, Shuaipeng Li, Changlu Hou
Institution: Xihua University
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: gold
Estimated APC paid: $2,075
OpenAlex ID: W7204752238