Exact Timing Boundaries and Modular Integrity Checks for 5G NR Numerologies
Year: 2026
Type: software
Abstract: Reproducible derivation of exact normal-cyclic-prefix slot boundaries for 5G NR numerologies, a rigorous distinction between abstract slot-index groups and physical boundary sets, and a bounded analysis of residue-vector timing-integrity checks with Python and VHDL reference implementations.
Authors: Valeris, Reinaldo, Matheus, Gustavo
Institution: Universidad Dr. José Gregorio Hernández
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W7208818484
