Noise-Resilient Probability Control of 1T--1MTJ Probabilistic Bits Using SOI MOSFET Back Gates
Year: 2026
Type: article
Abstract: The one-transistor-one-magnetic tunnel junction (1T–1MTJ) probabilistic bit (p-bit) is a promising hardware primitive for energy-efficient Ising computing, yet its probability response is often highly sensitive to voltage fluctuations due to a narrow operating window. Here, we exploited the back gate (BG) of silicon-on-insulator (SOI) MOSFETs as an alternative probabilistic control terminal to enlarge the electrostatic tuning window. Compared with conventional front-gate operation, BG modulation reduces the sigmoid slope factor from 92.5 to 1.2 V–1, expanding the effective control window by over one order of magnitude. System-level max-cut simulations incorporating voltage discretization (10 mV) and Gaussian voltage noise ($\sigma {\,}={\,}{0}.{03}$) show that the proposed scheme maintains ~97% solution quality, whereas the front-gate counterpart degrades by ~7%. These results highlight SOI BG modulation as an effective device-level strategy for improving the robustness of p-bit-based Ising computing under realistic hardware constraints.
Authors: Yijun Qian, Jiangjiang Li, Haoze Wei, Enlong Liu, Yuan Gao, Amit Kumar Shukla, Fengyu Liu, Zhongying Xue, Shikun He, Fanyu Liu, Xing Wei, Yumeng Yang
Institutions: ShanghaiTech University, Chinese Academy of Sciences
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: hybrid
Estimated APC paid: $2,645
OpenAlex ID: W7220945286