Work

A 1.25‐GS/s SAR ADC With Scalable Input and 3–6‐Bit Reconfigurable Resolution for Operation Unit‐Based RRAM–CIM Architectures

Year: 2026

Type: article

Source: International Journal of Circuit Theory and Applications

DOI: 10.1002/cta.70702

Authors: Weiping Yang, Xuan Guo, Junqi Hong, Shengkun Zhang, U‐Fat Chio, Hui Xu, Bin Zhang, Changlin Chen

Institutions: National University of Defense Technology, Chinese Academy of Sciences, Institute of Microelectronics, Chongqing University of Posts and Telecommunications, China Electronics Technology Group Corporation

Language: English

Topic: Analog and Mixed-Signal Circuit Design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W7225834739

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Cites: 15

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