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Karuna Nidhi

Observed names: Karuna N. Sharma, Nidhi, Karuna
ORCID: 0000-0003-4512-9580
Observed ORCID: 0000-0003-4512-9580
OpenAlex ID: A5009081229
Energy Transformation Between the Inductor and the Power Transistor for the Unclamped Inductive Switching (UIS) Test
2020 · Karuna Nidhi, Jian-Hsing Lee, et al. · IEEE Transactions on Device and Materials Reliability · 15
RESURF Region Variation Induced Current Crowding Effect on HV p-LDMOS
2023 · Jian-Hsing Lee, Ching-Ho Li, et al. · IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) · 9
Improving Safe-Operating-Area of a 5-V n-Channel Large Array MOSFET in a 0.15- $\mu$ m BCD Process
2018 · Karuna Nidhi, Ming-Dou Ker, et al. · IEEE Transactions on Electron Devices · 8
The Influence of Gate-Series-Resistor on the ESD Protection and Switching Speed for 650V GaNHEMT Circuit
2024 · Jian-Hsing Lee, Yeh-Jen Huang, et al. · IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) · 7
System-Level ESD-Induced Voltage Fluctuation to the Power of Integrated Circuits on System Board
2022 · Jian-Hsing Lee, Karuna Nidhi, et al. · IEEE Transactions on Electromagnetic Compatibility · 7
The Failure Mechansim of the E-SOA Boundary of Power Transistor Collapsed at Higher Gate Voltage
2021 · Jian-Hsing Lee, Karuna Nidhi, et al. · IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) · 7
A Two-Dimensional Model for the Field-Plate Design of High-Voltage Transistor
2022 · Jian-Hsing Lee, Chih-Cherng Liao, et al. · IEEE Transactions on Electron Devices · 6
A CMOS-Process-Compatible Low-Voltage Junction-FET With Adjustable Pinch-Off Voltage
2017 · Karuna Nidhi, Ming-Dou Ker · IEEE Transactions on Electron Devices · 6
A Combination of Implant Shadow and Skin Effects Leading to HV Devices Failure during the ESD Event
2023 · Jian-Hsing Lee, Ching-Ho Li, et al. · IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) · 5
Analyze the ESD Discrepancy between Grounded-Gate and Floating-Gate Power Transistors with Gate Electric Field and Magnetic Field Induced by ESD
2022 · Jian-Hsing Lee, Karuna Nidhi, et al. · IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) · 5
Hysteresis Effect Induces the Inductor Power Loss of Converter during the Voltage Conversion
2021 · Jian-Hsing Lee, Karuna Nidhi, et al. · IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) · 5
New Energy Transformation Model for the Unclamped Inductive Switching (UIS) Test
2020 · Jian-Hsing Lee, Karuna Nidhi, et al. · IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) · 5
Avalanche Ruggedness Capability and Improvement of 5-V n-Channel Large-Array MOSFET in BCD Process
2019 · Karuna Nidhi, Ming-Dou Ker, et al. · IEEE Transactions on Electron Devices · 4
Analyzing Gate-Driven Circuit Parameters for Adding ESD Performances
2019 · Shao-Chang Huang, Hsien-Feng Liao, et al. · IEEE International Conference on Consumer Electronics - Taiwan (ICCE-Taiwan) · 4
The Failure Mechanism of the Guard-Rings in Two Different Power Domains during the Latch-Up Test
2022 · Jian-Hsing Lee, Chih-Hsuan Lin, et al. · IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) · 3
The Mechanism of Field-Plate Induced the Breakdown Voltage Change of High Voltage LDMOS
2021 · Ching-Kuei Shih, Chih-Cherng Liao, et al. · CAS proceedings · 3
Study on the Guard Rings for Latchup Prevention between HV-PMOS and LV-PMOS in a 0.15-µm BCD Process
2021 · Chao-Yang Chen, Jian-Hsing Lee, et al. · IEEE International Reliability Physics Symposium proceedings · 3
An Area-Saving and Low-Leakage ESD Protection Circuit for 650V E-Mode GaN-HEMT
2025 · Jian-Hsing Lee, Yeh-Jen Huang, et al. · IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) · 2
The Failure Mechanism of Internal Circuit During ESD Striking a Power to Another Power
2024 · Chih-Cherng Liao, Ching-Ho Li, et al. · IEEE Transactions on Device and Materials Reliability · 2
The Effect of the P-Substrate Connection on the HBM Robustness of P-type ESD Device
2024 · Jian-Hsing Lee, Chih-Cherng Liao, et al. · IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) · 2
NBL Causing Low Latch-up Immunity between HV-PMOS and LV-P/NMOS in a 0.15-µm BCD Process
2021 · Chao-Yang Chen, Jian-Hsing Lee, et al. · Annual EOS/ESD Symposium (EOS/ESD) · 2
Package and Chip Accelerated Aging Methods for Power MOSFET Reliability Evaluation
2019 · Tingyou Lin, Chauchin Su, et al. · Design, Automation, and Test in Europe · 2
Effect of trench depth and trench angle in a high voltage polyflanked-Super junction MOSFET
2013 · Kumar M P Vijay, Grama Srinath Shreyas, et al. · IEEE Nanotechnology Materials and Devices Conference (NMDC) · 2
Characterization of NBTI by evaluation of hydrogen amount in the Si/SiO2 interface
2012 · Surya Kris Amethystna, Karuna Nidhi, et al. · IEEE International Conference on Semiconductor Electronics · 2
Effect of Finger and Device-Width on Ruggedness of nLDMOS Device under Single-Pulse Unclamped Inductive Switching (UIS) Conditions
2012 · Neelam Agarwal, Karuna N. Sharma, et al. · ECS Transactions · 2
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Works count: 33
Citation count: 123
H-index: 6
I10-index: 1
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