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M. Braccioli

Experimental assessment of self-heating in SOI FinFETs
2009 · A.J. Scholten, G.D.J. Smit, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 100
Simulation of self-heating effects in different SOI MOS architectures
2009 · M. Braccioli, G. Curatola, et al. · Solid-State Electronics · 46
A comparison of advanced transport models for the computation of the drain current in nanoscale nMOSFETs
2009 · P. Palestri, C. Alexander, et al. · Solid-State Electronics · 18
Analysis of Scaling Strategies for Sub-30 nm Double-Gate SOI N-MOSFETs
2007 · Nicola Barin, Marco Braccioli, et al. · IEEE Transactions on Nanotechnology · 13
Monte-Carlo Simulation of Decananometric Double-Gate SOI devices: Multi-Subband vs. 3D-Electron Gas with Quantum Corrections
2006 · I. Riolino, M. Braccioli, et al. · European Solid-State Device Research Conference · 13
Simulation of self-heating effects in 30nm gate length FinFET
2008 · M. Braccioli, G. Curatola, et al. · Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon · 7
Comparison of Monte Carlo Transport Models for Nanometer-Size MOSFETs
2007 · C. Fiegna, M. Braccioli, et al. · Springer eBooks · 7
Simulation of Self‐Heating Effects in Different SOI MOS Architectures
2010 · Enrico Sangiorgi, Marco Braccioli, et al. · 5
AC and DC numerical simulation of Self–Heating Effects in FinFETs
2010 · M. Braccioli, A.J. Scholten, et al. · Archivio istituzionale della ricerca (Alma Mater Studiorum Università di Bologna) · 4
Comparison of advanced transport models for nanoscale nMOSFETs
2009 · P. Palestri, C. Alexander, et al. · Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon · 4
Monte-Carlo simulation of decananometric nMOSFETs: Multi-subband vs. 3D-electron gas with quantum corrections
2007 · I. Riolino, M. Braccioli, et al. · Solid-State Electronics · 4
Scaling the high-performance double-gate SOI MOSFET down to the 32 nm technology node with SiO/sub 2/-based gate stacks
2006 · N. Barin, M. Braccioli, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 4
Comparison of semiclassical transport formulations including quantum corrections for advanced devices with High-K gate stacks
2010 · F. M. Bufler, V. Aubry-Fortuna, et al. · International Workshop on Computational Electronics · 3
32nm technology node Double-Gate SOI MOSFET using SiO2 gate stacks
2006 · Enrico Sangiorgi, Nicola Barin, et al. · International Workshop on Nano CMOS (IWNC) · 2
modello del MOSFET bSIM3
2010 · Braccioli, Marco · AMS Campus - AlmaDL
Drain current computation in nanoscale nMOSFETs: Comparison of transport models
2010 · E. Sangiorgi, C. Alexander, et al.
Simulation of Bulk and SOI Digital Circuits Including Self-Heating Effects
2010 · Uttariya Roy, M. Braccioli, et al. · Archivio istituzionale della ricerca (Alma Mater Studiorum Università di Bologna)
Comparison of semiclassical transportformulations including quantum corrections foradvanced devices with High-K gate stacks
2010 · F. M. Bufler, V. Aubry Fortuna, et al. · International Workshop on Computational Electronics
Study of silicon-on-insulator multiple-gate MOS structures including band-gap engineering and self heating effects
2009 · Braccioli, Marco <1979> · AMS Dottorato Institutional Doctoral Theses Repository (University of Bologna)
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Etude des transistors MOS silicium-sur-isolant à grilles multiples tenant en compte de l'ingénierie de la bande interdite et des effets d'auto-échauffement
2009 · M. Braccioli · OpenGrey (Institut de l'Information Scientifique et Technique)
Comparative analysis of self-heating in different SOI architectures
2008 · M. Braccioli, C. Fiegna, et al. · Archivio istituzionale della ricerca (Alma Mater Studiorum Università di Bologna)
Monte-Carlo simulation of MOSFETs with band offsets in the source and drain
2007 · M. Braccioli, P. Palestri, et al. · Solid-State Electronics
Analysis of two alternative scaling strategies for sub-30 nm Double-Gate SOI MOSFETs
2006 · N. Barin, M. Braccioli, et al. · Archivio istituzionale della ricerca (Alma Mater Studiorum Università di Bologna)
Comparison of BULK and Ultra-Thin Double Gate SOI MOSFETs for the 65 nm Technology Node: a Monte-Carlo Study
2005 · M. Braccioli, S. Eminente, et al. · Institutional Research Information System (University of Udine)
Works count: 28
Citation count: 230
H-index: 7
I10-index: 5
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