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John C. Willis

Observed names: J. Willis, J.C. Willis, John Willis, Willis, John, Willis, John C.
OpenAlex ID: A5020052190
Optimizing VHDL compilation for parallel simulation
1992 · J.C. Willis, D.P. Siewiorek · IEEE Design & Test of Computers · 19
The advanced intermediate representation with extensibility/common environment (AIRE/CE)
2002 · J.C. Willis, G.D. Peterson, et al. · IEEE National Aerospace and Electronics Conference (NAECON) · 12
High-Performance Hardware Description Language simulation: Modeling Issues and Recommended Practices
1999 · Gregory D. Peterson, John C. Willis · SIMULATION · 7
Use of embedded scheduling to compile VHDL for effective parallel simulation
1995 · John C. Willis, Zhiyuan Li, et al. · 7
Language design requirements for VHDL-RF/MW/sup TM/
2003 · J. Willis, J. Johnson · IEEE MTT-S International Microwave Symposium digest · 3
Cache coherence in systems with parallel communication channels and many processors
2002 · J.C. Willis, A.C. Sanderson, et al. · ACM/IEEE Conference on Supercomputing (SC) · 3
RAPIDbus architecture and realization
2018 · Willis, John C., Sanderson, Arthur C. · KiltHub Repository · 2
RAPIDbus : design of an extensible multiprocessor structure
2018 · Willis, John C., Sanderson, Arthur C.
An Intelligent Communications Backplane Architecture.
2004 · John C. Willis, Anshu Gaur, et al.
Very High Speed Integrated Circuits (VHISC) Hardware Description Language (VHDL) Interactive Validation Alchemy (VIVA). Technology and Software for Semiautomated, High Fidelity Validation of VHDL-Related Tools
2001 · Gallagher, Patrick, Newshutz, Robert, et al. · Defense Technical Information Center (DTIC)
Automating the Validation of Hardware Description Language Processing Tools
2001 · Sathyanarayanan Seshadri, Sanjeev Thiyagarajan, et al. · Springer eBooks
Works count: 12
Citation count: 53
H-index: 4
I10-index: 2
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