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Marc-Andre LaCroix

Observed names: M. LaCroix, M.-A. LaCroix, MarcAndre LaCroix
ORCID: 0000-0002-6868-6294
Observed ORCID: 0000-0002-6868-6294
OpenAlex ID: A5026656991
30-100-GHz inductors and transformers for millimeter-wave (Bi)CMOS integrated circuits
2005 · T.O. Dickson, M.-A. LaCroix, et al. · IEEE Transactions on Microwave Theory and Techniques · 227
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8.4 A 116Gb/s DSP-Based Wireline Transceiver in 7nm CMOS Achieving 6pJ/b at 45dB Loss in PAM-4/Duo-PAM-4 and 52dB in PAM-2
2021 · Marc-Andre LaCroix, Euhan Chong, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 82
6.2 A 60Gb/s PAM-4 ADC-DSP Transceiver in 7nm CMOS with SNR-Based Adaptive Power Scaling Achieving 6.9pJ/b at 32dB Loss
2019 · Marc-Andre LaCroix, Henry Wong, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 71
A 112-Gb/s PAM-4 Low-Power Nine-Tap Sliding-Block DFE in a 7-nm FinFET Wireline Receiver
2021 · James Bailey, Hossein Shakiba, et al. · IEEE Journal of Solid-State Circuits · 59
A 64-Gb/s 4-PAM Transceiver Utilizing an Adaptive Threshold ADC in 16-nm FinFET
2018 · Luke Wang, Yingying Fu, et al. · IEEE Journal of Solid-State Circuits · 51
A 224 Gb/s 3 pJ/bit 40 dB Insertion Loss Transceiver in 3-nm FinFET CMOS
2024 · Dirk Pfaff, Muhammad Nummer, et al. · IEEE Journal of Solid-State Circuits · 37
A 64Gb/s PAM-4 transceiver utilizing an adaptive threshold ADC in 16nm FinFET
2018 · Luke Wang, Yingying Fu, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 37
7.3 A 224Gb/s 3pJ/b 40dB Insertion Loss Transceiver in 3nm FinFET CMOS
2024 · Dirk Pfaff, Muhammad Nummer, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 36
A 4-GS/s Single Channel Reconfigurable Folding Flash ADC for Wireline Applications in 16-nm FinFET
2017 · Luke Wang, Marc-Andre LaCroix, et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 33
Si-based inductors and transformers for 30-100 GHz applications
2004 · T. Dickson, M.-A. LaCroix, et al. · IEEE MTT-S International Microwave Symposium digest · 23
8.8 A 112Gb/s PAM-4 Low-Power 9-Tap Sliding-Block DFE in a 7nm FinFET Wireline Receiver
2021 · James Bailey, Hossein Shakiba, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 13
Back gate bias effect and layout dependence on Random Telegraph Noise in FDSOI technologies
2021 · P. Srinivasan, D. Song, et al. · IEEE International Reliability Physics Symposium proceedings · 3
A 224Gb/s 3pJ/bit 42dB Insertion Loss Post-FEC Error Free Transceiver in 3-nm FinFET CMOS (Invited)
2025 · Dirk Pfaff, Muhammad Nummer, et al. · Custom Integrated Circuits Conference · 2
Studies on Input Couplers for Superconducting Cavities
2008 · Hassen Jenhani, A. Variola, et al. · 2
A low jitter clocking strategy for a 7.5-Gb/s SerDes array in 65nm CMOS technology
2007 · Paul Madeira, Marc-Andre LaCroix, et al. · European Solid-State Circuits Conference (ESSCIRC)
Passive device models for monolithic millimeter-wave integrated circuits on silicon
2002 · Marc-Andre LaCroix · Carleton University's Institutional Repository (MacOdrum Library, Carleton University)
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Works count: 16
Citation count: 676
H-index: 11
I10-index: 11
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