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Sirisha Meriga
Institutions:
Vasireddy Venkatadri International Technological University,
Indian Institute of Technology BHU
Observed institutions:
National Institute Of Technology Silchar,
Vasireddy Venkatadri International Technological University,
Indian Institute of Technology BHU
ORCID:
0000-0001-8904-1674
Observed ORCID:
0000-0001-8904-1674
OpenAlex ID:
A5030834633
Investigation of a dual gate pocket-doped drain engineered tunnel FET and its reliability issues
2023
·
Sirisha Meriga
, Brinda Bhowmick
·
Applied Physics A
·
15
Robustness of Raised Buried Oxide Ferro Electric Tunnel FET in presence of Temperature and Traps and its Analog/RF Performance
2024
·
Sirisha Meriga
, Brinda Bhowmick
·
Applied Physics A
·
12
Deep Insight into Raised Buried Oxide SOI-Fe TFET and It’s Analog/RF and Linearity Performance Parameters
2023
·
Sirisha Meriga
, Brinda Bhowmick
·
Transactions on Electrical and Electronic Materials
·
10
Compact drain current model of a double-gate raised buried oxide TFET for integrated circuit application
2023
·
Sirisha Meriga
, Brinda Bhowmick
·
Journal of Computational Electronics
·
9
Label Free Bio-detection using di-electrically modulated pocket doped drain engineered ferro-electric gate tunnel FET
2026
·
Sirisha Meriga
, M. Kalpana Chowdary
, et al.
·
Applied Physics A
·
4
Schrodinger Wave equation based Drain Current Model for Nano Scale device
2022
·
Sirisha Meriga
, Brinda Bhowmick
·
IEEE Global Conference for Advancement in Technology (GCAT)
·
4
Optimization of Hetero Buried Oxide Doped-Pocket Gate-Engineered Tunnel FET Structures
2023
·
Sirisha Meriga
, Brinda Bhowmick
·
CRC Press eBooks
·
2
Reliability-Oriented Design of Source-All-Around Vertical TFETs: Mitigation Strategies for Noise, Interface Traps, and Thermal Instability
2026
·
Potharaju Ramesh
, Sirisha Meriga
, et al.
·
Silicon
·
1
Exploration of the Performance of SOI-Tunnel FETs with Extended Source for DC and Analog Applications
2025
·
B. V. Rao
, Arun Kumar
, et al.
·
Journal of Electronic Materials
·
1
Compact Analytical Model for a Raised Buried Oxide Ferroelectric TFET for RF/Analog Applications and Its Implementation as an Inverter
2025
·
Sirisha Meriga
, M. Kalpana Chowdary
, et al.
·
Journal of Electronic Materials
·
1
Investigation of Frequency-Reliant Dielectric Constant-Dependent Drain-Engineered Ferroelectric Gate Tunnel FET for Biosensing in Glioblastoma Multiforme
2026
·
Sirisha Meriga
, Harshit Srivastava
, et al.
·
IEEE Sensors Journal
Optimization of Hetero Buried Oxide Ferro TFET and Its Analysis
2025
·
Sirisha Meriga
, Brinda Bhowmick
·
Wiley eBooks
PDF
DC and Analog/RF Performance Analysis of Hetero Buried Oxide (BOX)-Extended Source Tunnel FETs
2025
·
Busani Venkateswara Rao
, Sirisha Meriga
, et al.
·
Lecture notes in electrical engineering
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Works count:
13
Citation count:
59
H-index:
4
I10-index:
3
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