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Author

WonChul Do

Observed name: Wonchul Do
Institution: Sogang University
ORCID: 0009-0002-0459-7396
Observed ORCID: 0009-0002-0459-7396
OpenAlex ID: A5045894895
Silicon Wafer Integrated Fan-out Technology
2017 · Curtis Zwenger, George Scott, et al. · Additional Conferences (Device Packaging HiTEC HiTEN & CICMT) · 44
Silicon Wafer Integrated Fan-out Technology
2015 · Curtis Zwenger, Ron Huemoeller, et al. · Additional Conferences (Device Packaging HiTEC HiTEN & CICMT) · 41
SLIM (TM), High Density Wafer Level Fan-Out Package Development with Submicron RDL
2017 · YoungRae Kim, JaeHun Bae, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 31
Electrical and Thermal Simulation of SWIFT (TM) High-Density Fan-Out PoP Technology
2017 · Curtis Zwenger, George Scott, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 30
Chip Stackable, Ultra-thin, High-Flexibility 3D FOWLP (3D SWIFT® Technology) for Hetero-Integrated Advanced 3D WL-SiP
2018 · WonMyoung Ki, WonGeoL Lee, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 29
S-Connect Fan-out Interposer For Next Gen Heterogeneous Integration
2021 · JiHun Lee, GamHan Yong, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 23
Development of an Extremely High Thermal Conductivity TIM for Large Electronics Packages in the 4th Industrial Revolution Era
2020 · MiKyeong Choi, HyunHye Jung, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 13
Substrate Silicon Wafer Integrated Fan-out Technology (S-SWIFT®) Packaging with Fine Pitch Embedded Trace RDL
2022 · SangHyun Jin, WonChul Do, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 10
A New RDL-First PoP Fan-Out Wafer-Level Package Process with Chip-to-Wafer Bonding Technology
2020 · SeungNam Son, DongHyun Khim, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 8
Chip-Last HDFO (High-Density Fan-Out) Interposer-PoP
2021 · JaeYoon Kim, KyeRyung Kim, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 7
High-Density Fan-Out Technology for Advanced SiP and Heterogeneous Integration
2018 · WonChul Do · IEEE Electron Devices Technology & Manufacturing Conference (EDTM) · 6
Wafer Level Void-Free Molded Underfill for High-Density Fan-out Packages
2020 · InSu Mok, JaeHun Bae, et al. · IEEE Electronics Packaging Technology Conference (EPTC) · 5
Reliability Performance of S-Connect Module (Bridge Technology) for Heterogeneous Integration Packaging
2023 · Heejun Jang, Kyun Ahn, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 4
A Hybrid Panel Level Package (Hybrid PLP) Technology Based on a 650-mm x 650-mm Platform
2022 · Eoin O’Toole, José Luís Silva, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 4
Hybrid 3D Package with RDL and Laminate Substrate for Ultra-Thin and High-Bandwidth Applications
2020 · JaeYoon Kim, KyeRyung Kim, et al. · IEEE Electronics Packaging Technology Conference (EPTC) · 3
A Novel System-in-Package using High-Density Fan-out Technology for Heterogeneous Integration
2018 · SeungNam Son, HoDol Yoo, et al. · IEEE Electron Devices Technology & Manufacturing Conference (EDTM) · 3
Optimization of Temporary Carrier Technology for HDFO Packaging
2022 · JinKun Yoo, DooWon Lee, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 2
Single-Mask Embedded Trace Redistribution Layer Technology Using Grayscale Lithography
2025 · Wonchul Do, Sanghyun Jin, et al. · IEEE Transactions on Components Packaging and Manufacturing Technology · 1
An Embedded Trace Redistribution Layer with Rounded-Bottom Cu Geometry and Ti Capping for Enhanced Electromigration Reliability
2026 · Wonchul Do, Jeongmin Ju, et al. · Micromachines
Study on Backside Metallization for the S-SWIFT™ Package
2025 · Dambi Jo, JiHyun Kim, et al. · IEEE Electronics Packaging Technology Conference (EPTC)
Works count: 20
Citation count: 264
H-index: 8
I10-index: 8
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