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Oliver Lexter July A. Jose

Observed names: Oliver Lexter July Alvarez Jose, Oliver L J A Jose, Oliver Lexter July Alvarez Jose, Oliver Lexter July Jose
ORCID: 0000-0003-4565-9506
Observed ORCID: 0000-0003-4565-9506
OpenAlex ID: A5058562624
An adaptive constant current and voltage mode P&O-based Maximum Power Point Tracking controller IC using 0.5- μm HV CMOS
2021 · Chua-Chin Wang, Oliver Lexter July A. Jose, et al. · Microelectronics Journal · 20
SiC MOSFET High Side Gate Driver Design Using HV CMOS Process
2023 · Oliver Lexter July A. Jose, Jui-Min Kuo, et al. · IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) · 9
A 210-MHz 4.23 fJ Energy/Bit 1-kb Asymmetrical Schmitt-Trigger-Based SRAM Using 40-nm CMOS Process
2023 · Ralph Gerard B. Sangalang, Shiva Reddy, et al. · IEEE Transactions on Circuits & Systems II Express Briefs · 8
A 1.0 fJ energy/bit single‐ended 1 kb 6T SRAM implemented using 40 nm CMOS process
2023 · Chua‐Chin Wang, Ralph Gerard B. Sangalang, et al. · IET Circuits Devices & Systems · 6
Single-chip DC–DC buck converter design based on PWM with high-efficiency in light load
2022 · Chua-Chin Wang, Oliver Lexter July A. Jose, et al. · International Journal of Electronics Letters · 6
A Power Transistor Active Gate Driver With Two-Level Miller Plateau Detection and Driving Device Equalization Using 180-nm HV BCD Process
2025 · Chua-Chin Wang, Pradyumna Vellanki, et al. · IEEE Open Journal of Circuits and Systems · 5
A 15.13 mW 3.2 GHz 8-bit carry look-ahead adder using single-phase all-N-transistor logic
2024 · Chua-Chin Wang, L S S Pavan Kumar Chodisetti, et al. · Integration · 5
A 6.25-MHz 3.4-mW Single Clock DPWM Technique Using Matrix Shift Array
2024 · Oliver Lexter July A. Jose, Venkata Naveen Kolakaluri, et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 4
2-Level Miller Detection-Based High Side Gate Driver Design for Power MOSFETs
2023 · Oliver Lexter July A. Jose, Venkata Naveen Kolakaluri, et al. · IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) · 4
A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process
2023 · Chua-Chin Wang, Lean Karlo S. Tolentino, et al. · Integration · 4
A 16-nm FinFET 28.8-mW 800-MHz 8-Bit All-N-Transistor Logic Carry Look-Ahead Adder
2022 · Chua-Chin Wang, Oliver Lexter July A. Jose, et al. · Circuits Systems and Signal Processing · 4
BatStateU Integrated Response Drone (BIRD): A Hybrid Unmanned Vehicle for Disaster Response
2022 · Ralph Gerard B. Sangalang, Oliver Lexter July A. Jose, et al. · International Journal of Computing and Digital Systems · 4
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A Multi-Level Power Gating Logic Controlled Driver for A 10-V Power Transistor Using 180-nm High Voltage BCD Process
2024 · Soumika Majumder, Lean Karlo Santos Tolentino, et al. · International SoC Design Conference · 3
A Wide Range 2-to-2048 Division Ratio Frequency Divider Using 40-nm CMOS Process
2024 · Soumika Majumder, Venkata Naveen Kolakaluri, et al. · IEEE International Symposium on Circuits and Systems proceedings · 2
A 92.95%-efficiency high-voltage dual-mode buck converter using 0.5-µm HV CMOS process
2023 · Chua-Chin Wang, Lean Karlo S. Tolentino, et al. · International Journal of Electronics · 2
A negative voltage generator with 4-stage configurable parallel switching for smart window film applications
2023 · Chua-Chin Wang, Lean Karlo S. Tolentino, et al. · International Journal of Electronics Letters · 2
Up To 99.6 % duty cycle digital PWM using 180-nm CMOS process
2025 · Chua-Chin Wang, Oliver Lexter July Alvarez Jose, et al. · Microelectronics Journal · 1
A 10-MHz 5-V On-chip 6-layer Multi-level Digital Transformer Using T18HVG2 Process
2024 · Oliver Lexter July A. Jose, Yun-Che Chang, et al. · IEEE International Symposium on Circuits and Systems proceedings · 1
A 99.6 % Duty Cycle High-Resolution DPWM Using Reconfiguring Decoder
2023 · Venkata Naveen Kolakaluri, Oliver Lexter July A. Jose, et al. · IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) · 1
Matrix Phase Shift Based DPWM Technique To Achieve 90% Duty Cycle
2023 · Venkata Naveen Kolakaluri, Oliver Lexter July A. Jose, et al. · IEEE International Symposium on Circuits and Systems proceedings · 1
A 5.4 ps resolution TDC design with anti-PVT-variation mechanism using 90-nm CMOS process
2023 · Chua-Chin Wang, Oliver Lexter July A. Jose, et al. · International Journal of Electronics · 1
A Low-Energy 8-bit CLA Realized by Single-Phase ANT Logic
2022 · Durga Srikanth Kamarajugadda, Oliver Lexter July A. Jose, et al. · IEEE International Conference on IC Design and Technology (ICICDT) · 1
A pivotal restructuring of modelling the control of COVID-19 during and after massive vaccination for the next few years
2021 · Jose B Cruz, Tirso A Ronquillo, et al. · Research Square · 1
A hybrid improved P&O-Model Predictive Control MPPT strategy for photovoltaic systems
2026 · Yanfei Teng, Ralph Gerard B. Sangalang, et al. · Journal of Engineering Research
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PV Power Generation System Based on Piecewise Variable-Step Size Perturbation Method and Fuzzy PID Control MPPT
2026 · Ye Yuan, Oliver Lexter July A. Jose · International Conference on Electrical Engineering, Automation and Information Science (EEAIS)
Works count: 44
Citation count: 95
H-index: 5
I10-index: 1
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