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K. C. Chen

Observed names: K.C. Chen, Kuang-Chao Chen
Observed institution: Macronix International (Taiwan)
ORCID: 0000-0002-7715-808X
Observed ORCID: 0000-0002-7715-808X
OpenAlex ID: A5074218302
Polycrystalline-silicon channel trap induced transient read instability in a 3D NAND flash cell string
2016 · Wen-Jer Tsai, W. L. Lin, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 37
Poly-Silicon Trap Position and Pass Voltage Effects on RTN Amplitude in a Vertical NAND Flash Cell String
2016 · Y. L. Chou, Tahui Wang, et al. · IEEE Electron Device Letters · 27
Highly reliable 2-bit/cell nitride trapping flash memory using a novel array-nitride-sealing (ANS) ONO process
2006 · Yen-Hao Shih, S.C. Lee, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 18
Overlay target design and evaluation for SADP process
2012 · C. W. Yeh, Chao-Tien H. Huang, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 16
Study of electron and hole injection statistics of BE-SONOS NAND Flash
2010 · Hang-Ting Lue, Tzu-Hsuan Hsu, et al. · IEEE International Memory Workshop (IMW) · 9
Within-wafer CD variation induced by wafer shape
2016 · Chi-hao Huang, Mars Yang, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 7
Junction optimization for Reliability issues in floating gate NAND flash cells
2011 · C. H. Lee, I. C. Yang, et al. · IEEE International Reliability Physics Symposium proceedings · 7
Novel ATHENA mark design to enhance alignment quality in double patterning with spacer process
2010 · L. W. Chen, Mars Yang, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 6
Rule-based hotspot correction using a pattern matching flow
2021 · Bradley J. Falch, Tony Hu, et al. · SPIE Design-Process-Technology Co-optimization · 5
Exposure process optimization using machine learning overlay prediction
2022 · Masahiro Yoshida, Wei-Hung Wang, et al. · Metrology, Inspection, and Process Control XXXVI · 4
Investigation of data pattern effects on nitride charge lateral migration in a charge trap flash memory by using a random telegraph signal method
2018 · Y. H. Liu, H. Y. Lin, et al. · IEEE International Reliability Physics Symposium proceedings · 4
Overlay degradation induced by film stress
2017 · Chi-hao Huang, Yu-Lin Liu, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 4
SMO and NTD for robust single exposure solution on contact patterning for 40nm node flash memory devices
2013 · Chih-Chieh Yu, C. C. Yang, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 4
Cell endurance prediction from a large-area SONOS capacitor
2009 · C. H. Lee, W. H. Tu, et al. · IEEE International Reliability Physics Symposium proceedings · 4
Imaging-based overlay metrology optimized by HV-SEM in 3D-NAND process
2021 · Yu-Lin Liu, Li-Ting Chang, et al. · Metrology, Inspection, and Process Control for Semiconductor Manufacturing XXXV · 3
Chip-level characterization and RTN-induced error mitigation beyond 20nm floating gate flash memory
2018 · T. W. Lin, S. H. Ku, et al. · IEEE International Reliability Physics Symposium proceedings · 3
Optimizing the lithography model calibration algorithms for NTD process
2016 · C. M. Hu, Fred Lo, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 3
Overall operation considerations for a SONOS-based memory
2009 · C. H. Lee, W. H. Tu, et al. · International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA) · 3
Investigation of device overlay variation and control metrology in 3D-NAND process
2023 · Yu-Lin Liu, Li-Ting Chang, et al. · Metrology, Inspection, and Process Control XXXVI · 2
CD uniformity control for thick resist process
2017 · Chi-hao Huang, Yu-Lin Liu, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2
Pattern collapse solution for asymmetric pattern
2017 · C. J. Tu, C. H. Huang, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2
CD uniformity improvement of dense contact array in negative tone development process
2015 · Fengnien Tsai, Teng-hao Yeh, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2
Variations of $V_{t}$ Retention Loss in a SONOS Flash Memory Due to a Current-Path Percolation Effect
2011 · Y. L. Chou, Y. T. Chung, et al. · IEEE Electron Device Letters · 2
A comprehensive comparison between double patterning and double patterning with spacer on sub-50nm product implementation
2008 · C. F. Tseng, C. C. Yang, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2
A Robust Read-Based PUF Generation Method in a 3-D NAND Flash Memory
2026 · You-Liang Chou, Wen-Jer Tsai, et al. · IEEE Transactions on Electron Devices · 1
Works count: 51
Citation count: 187
H-index: 7
I10-index: 4
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