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S. C. Chien

Observed names: S C Chien, S. Chien, S.-C. Chien, S.C. Chien, Shao-Ju Chien
ORCID: 0000-0002-6549-5564
Observed ORCID: 0000-0002-6549-5564
OpenAlex ID: A5079942795
The observation of trapping and detrapping effects in high-k gate dielectric MOSFETs by a new gate current Random Telegraph Noise (IG-RTN) approach
2008 · C. M. Chang, Steve S. Chung, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 63
RF passive devices on Si with excellent performance close to ideal devices designed by electro-magnetic simulation
2004 · A. Chin, K.T. Chan, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 37
Characterization of Adult Canine Kidney Epithelial Stem Cells That Give Rise to Dome-Forming Tubular Cells
2019 · Te-Chuan Chen, Manish Neupane, et al. · Stem Cells and Development · 20
Evolution of structural order in germanium ion-implanted amorphous silicon layers
2002 · S. L. Cheng, H. H. Lin, et al. · Journal of Applied Physics · 20
The minimum noise figure and mechanism as scaling RF MOSFETs from 0.18 to 0.13 μm technology nodes
2003 · C.H. Huang, K.T. Chan, et al. · Digest of papers - IEEE Radio Frequency Integrated Circuits Symposium · 19
Low RF noise and power loss for ion-implanted Si having an improved implantation process
2003 · K.T. Chan, A. Chin, et al. · IEEE Electron Device Letters · 18
Low RF loss and noise of transmission lines on Si substrates using an improved ion implantation process
2003 · K.T. Chan, A. Chin, et al. · IEEE MTT-S International Microwave Symposium digest · 17
A novel and direct determination of the interface traps in sub-100 nm CMOS devices with direct tunneling regime (12∼16 A) gate oxide
2003 · S.S. Chung, S.-J. Chen, et al. · Symposium on VLSI Technology · 17
New Observations on the Uniaxial and Biaxial Strain-Induced Hot Carrier and NBTI Reliabilities for 65nm Node CMOS Devices and Beyond
2006 · Steve S. Chung, D. C. Huang, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 14
A 28nm poly/SiON CMOS technology for low-power SoC applications
2011 · C. W. Liang, Miaodi Chen, et al. · Symposium on VLSI Technology · 12
A Novel “hybrid” high-k/metal gate process for 28nm high performance CMOSFETs
2009 · C. M. Lai, C. T. Lin, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 12
Mobility and Strain Effects on <110>/(110) SiGe channel pMOSFETs for High Current Enhancement
2006 · J. W. Pan, P. W. Liu, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 11
More strain and less stress- the guideline for developing high-end strained CMOS technologies with acceptable reliability
2008 · Steve S. Chung, E. R. Hsieh, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 7
A Novel RF-WAT Test Structure for Advanced Process Monitoring in SOC Applications
2007 · David C. Chen, Ryan Lee, et al. · IEEE International Conference on Microelectronic Test Structures (ICMTS) · 5
Hot Carrier Degradation and Performance of 65nm RF n-MOSFET
2007 · Mohammed Fakhruddin, Mao Chyuan Tang, et al. · Digest of papers - IEEE Radio Frequency Integrated Circuits Symposium · 4
The Channel Backscattering Characteristics of Sub-100nm CMOS Devices with Different Channel/Substrate Orientations
2007 · Y. J. Tsai, Steve S. Chung, et al. · International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA) · 4
Technology Roadmaps on the Ballistic Transport in Straln Engineered Nanoscale CMO0S Devices
2007 · Steve S. Chung, Y. J. Tsai, et al. · IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) · 4
Soft breakdown enhanced hysteresis effects in ultra-thin oxide SOI nMOSFETs
2003 · M.C. Chen, C.W. Tsai, et al. · IEEE International Reliability Physics Symposium proceedings · 4
A new insight into the degradation mechanisms of various mobility-enhanced cmos devices with different substrate engineering
2006 · S.S. Chung, Y.R. Liu, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 3
Extending the reliability scaling limit of gate dielectrics through remote plasma nitridation of N/sub 2/O-grown oxides and NO RTA treatment
2003 · C.H. Liu, Hsiu-Shan Lin, et al. · IEEE International Reliability Physics Symposium proceedings · 3
Substrate-bias-dependent dielectric breakdown in ultrathin-oxide p-metal-oxide-semiconductor field-effect transistors
2005 · Sinclair Chiang, M. F. Lu, et al. · Journal of Applied Physics · 1
45nm gate length Bulk/PD-SOI CMOS transistors with low gate leakage current for high speed and low power applications
2004 · C.K. Yang, T.F. Chen, et al. · IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) · 1
Efficient Characterization Methodology of Gate-Bulk Leakage and Capacitance for Ultra-Thin Oxide Partially-Depleted (PD) SOI Floating Body CMOS
2009 · David Chen, Ryan Lee, et al. · IEEE International Conference on Microelectronic Test Structures (ICMTS)
Design of High-Q MIS-Varactors with Layout Modification
2008 · T. L. Li, S. Huang, et al. · International Conference on Solid State Devices and Materials (SSDM)
Impact of Dimension of Orthogonal Floating Shielding Lines beneath Coplanar Waveguide Transmission Line on Suppressing Substrate Effect
2008 · M. C. Tang, Y. K. Fang, et al. · International Conference on Solid State Devices and Materials (SSDM)
Works count: 42
Citation count: 296
H-index: 11
I10-index: 12
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