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Tung-Chieh Chen

Observed name: Tung-chieh Chen
ORCID: 0009-0000-3163-3634
Observed ORCID: 0009-0000-3163-3634
OpenAlex ID: A5089860877
NTUplace3: An Analytical Placer for Large-Scale Mixed-Size Designs With Preplaced Blocks and Density Constraints
2008 · Tung-Chieh Chen, Zhe-Wei Jiang, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 350
Modern floorplanning based on B/sup */-tree and fast simulated annealing
2006 · Tung-Chieh Chen, Yao-Wen Chang · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 168
NTUplace4h: A Novel Routability-Driven Placement Algorithm for Hierarchical Mixed-Size Circuit Designs
2014 · Meng-Kai Hsu, Yi-Fang Chen, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 98
Modern floorplanning based on fast simulated annealing
2005 · Tung-Chieh Chen, Yao-Wen Chang · International Symposium on Physical Design · 81
NTUplace4dr: A Detailed-Routing-Driven Placer for Mixed-Size Circuit Designs With Technology and Region Constraints
2017 · Chau-Chin Huang, Hsin-Ying Lee, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 78
A high-quality mixed-size analytical placer considering preplaced blocks and density constraints
2006 · Tung-Chieh Chen, Zhe-Wei Jiang, et al. · Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design · 77
NTUplace
2005 · Tung-Chieh Chen, Tien-Chang Hsu, et al. · International Symposium on Physical Design · 75
A Novel Analog Physical Synthesis Methodology Integrating Existent Design Expertise
2014 · Po-Hsun Wu, Mark Po-Hung Lin, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 57
Essential Issues in Analytical Placement Algorithms
2009 · Yao-Wen Chang, Zhe-Wei Jiang, et al. · IPSJ Transactions on System and LSI Design Methodology · 52
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IMF: interconnect-driven multilevel floorplanning for large-scale building-module designs
2005 · Tung-Chieh Chen, Yao-Wen Chang, et al. · International Conference on Computer Aided Design · 52
MP-Trees: A Packing-Based Macro Placement Algorithm for Modern Mixed-Size Designs
2008 · Tung-Chieh Chen, Ping-Hung Yuh, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 50
A New Multilevel Framework for Large-Scale Interconnect-Driven Floorplanning
2008 · Tung-Chieh Chen, Yao-Wen Chang, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 39
Routability-driven placement for hierarchical mixed-size circuit designs
2013 · Meng-Kai Hsu, Yi-Fang Chen, et al. · ACM/IEEE Design Automation Conference (DAC) · 36
Fast analog layout prototyping for nanometer design migration
2011 · Yi-Peng Weng, Hung-Ming Chen, et al. · 31
Exploring Feasibilities of Symmetry Islands and Monotonic Current Paths in Slicing Trees for Analog Placement
2014 · Po-Hsun Wu, Mark Po-Hung Lin, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 28
Performance-driven analog placement considering monotonic current paths
2012 · Po-Hsun Wu, Mark Po-Hung Lin, et al. · 25
A High-Quality Mixed-Size Analytical Placer Considering Preplaced Blocks and Density Constraints
2006 · Tung-chieh Chen, Zhe-wei Jiang, et al. · Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design · 25
A Fast Prototyping Framework for Analog Layout Migration With Planar Preservation
2015 · Po-Cheng Pan, Ching-Yu Chin, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 23
A novel damped-wave framework for macro placement
2017 · Chin-Hao Chang, Yao-Wen Chang, et al. · International Conference on Computer Aided Design · 22
MP-trees
2007 · Tung-Chieh Chen, Ping-Hung Yuh, et al. · ACM/IEEE Design Automation Conference (DAC) · 18
MDP-trees
2019 · Yen-Chun Liu, Tung-Chieh Chen, et al. · Asia and South Pacific Design Automation Conference (ASP-DAC) · 17
Flexible chip placement via reinforcement learning
2022 · Fu-Chieh Chang, Yu-Wei Tseng, et al. · ACM/IEEE Design Automation Conference (DAC) · 16
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FastPass: Fast timing path search for generalized timing exception handling
2018 · Pei-Yu Lee, Iris Hui-Ru Jiang, et al. · Asia and South Pacific Design Automation Conference (ASP-DAC) · 15
Automatic Floorplanning for AI SoCs
2020 · Tai-Chen Chen, Pei-Yu Lee, et al. · International Symposium on VLSI Design, Automation and Test · 14
Metal-Density-Driven Placement for CMP Variation and Routability
2008 · Tung-Chieh Chen, Minsik Cho, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 14
Works count: 54
Citation count: 1,607
H-index: 19
I10-index: 31
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