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Shuli Gao

Preparation of the endometrium for frozen embryo transfer: an update on clinical practices
2023 · Yiting Zhang, Xiao Fu, et al. · Reproductive Biology and Endocrinology · 68
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Calibration Transfer Based on Affine Invariance for NIR without Transfer Standards
2019 · Yuhui Zhao, Ziheng Zhao, et al. · Molecules · 21
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Implementation of large size multipliers using ternary adders and higher order compressors
2009 · Shuli Gao, Dhamin Al-Khalili, et al. · International Conference on Microelectronics (ICM) · 14
An improved BCD adder using 6-LUT FPGAs
2012 · Shuli Gao, Dhamin Al-Khalili, et al. · IEEE Interregional NEWCAS Conference (NEWCAS) · 12
Efficient Realization of BCD Multipliers Using FPGAs
2017 · Shuli Gao, Dhamin Al-Khalili, et al. · International Journal of Reconfigurable Computing · 11
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Efficient Scheme for Implementing Large Size Signed Multipliers Using Multigranular Embedded DSP Blocks in FPGAs
2009 · Shuli Gao, Dhamin Al-Khalili, et al. · International Journal of Reconfigurable Computing · 11
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Optimized realization of large-size two’s complement multipliers on FPGAs
2007 · Shuli Gao, Dhamin Al-Khalili, et al. · 10
Unsupervised anomaly detection system for railway turnout based on GAN
2019 · Lei Xue, Shuli Gao · Journal of Physics Conference Series · 8
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Efficient Realization of Large Size Two’s Complement Multipliers Using Embedded Blocks in FPGAs
2008 · Shuli Gao, Dhamin Al-Khalili, et al. · Circuits Systems and Signal Processing · 8
FPGA-Based Efficient Design Approach for Large-Size Two's Complement Squarers
2007 · Shuli Gao, Noureddine Chabini, et al. · IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP) · 8
Efficient Realization of Large Integer Multipliers and Squarers
2006 · Shuli Gao, Noureddine Chabini, et al. · 7
Asymmetric Large Size Signed Multipliers Using Embedded Blocks in FPGAs
2011 · Shuli Gao, Dhamin Al-Khalili, et al. · IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum · 6
FPGA realization of high performance large size computational functions: multipliers and applications
2011 · Shuli Gao, Dhamin Al-Khalili, et al. · Analog Integrated Circuits and Signal Processing · 5
Decimal floating-point multiplier with binary-decimal compression based fixed-point multiplier
2017 · Shuli Gao, Dhamin Al-Khalili, et al. · Conference proceedings - Canadian Conference on Electrical and Computer Engineering · 4
FPGA implementation of multiple Pursuit-Evasion games with decentralized Learning Automata
2014 · Shuli Gao, Sidney N. Givigi, et al. · IEEE International Systems Conference (SysCon) · 4
Dynamic Programming Addition Optimization approach for large size multipliers in FPGAs
2010 · Shuli Gao, Noureddine Chabini, et al. · IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) · 4
Efficient techniques for realizing large-size signed multipliers in FPGAs
2008 · Shuli Gao, Dham Al-Khalili, et al. · 3
FPGA-Based Efficient Design Approaches for Large Size Two’s Complement Squarers
2008 · Shuli Gao, Noureddine Chabini, et al. · Journal of Signal Processing Systems · 3
An Optimized Design Approach for Squaring Large Integers Using Embedded Hardwired Multipliers
2006 · Shuli Gao, N. Chabini, et al. · IEEE/ACS International Conference on Computer Systems and Applications (AICCSA) · 3
Step-Audio: Unified Understanding and Generation in Intelligent Speech Interaction
2025 · Huang, Ailin, Wu, Boyong, et al. · arXiv (Cornell University) · 2
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Step-Audio 2 Technical Report
2025 · Wu, Boyong, Yan, Chao, et al. · arXiv (Cornell University) · 1
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Research on the Lifting Path of Data Literacy Ability of Applied University Teachers under the Perspective of Organizational Learning
2024 · Shuli Gao, Yanli Guo · Open Journal of Applied Sciences · 1
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Optimized large size signed multipliers and applications in FPGAs
2010 · Shuli Gao, Dhamin Al-Khalili, et al. · IEEE Latin American Symposium on Circuits and Systems (LASCAS) · 1
Two level decomposition based matrix multiplication for FPGAs
2009 · Shuli Gao, Dhamin Al-Khalili, et al. · IEEE International Conference on Electronics, Circuits and Systems (ICECS) · 1
256×256-bit multiplier using multi-granular embedded DSP blocks in FPGAs
2008 · Shuli Gao, Noureddine Chabini, et al. · IEEE Interregional NEWCAS Conference (NEWCAS) · 1
Works count: 29
Citation count: 217
H-index: 8
I10-index: 7
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