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Jaeseung Choi

Observed names: Choi Jaeseung, Choi, Jae Seung, Jae Seung Choi, Jae-Seung Choi, Jae-seung Choi, JaeSeung Choi
Observed institutions: Ewha Womans University, Samsung (South Korea), Korea Agency for Infrastructure Technology Advancement, Samsung Electronics (South Korea), SK Hynix (South Korea), Hanyang University, Social Sciences and Humanities Research Council
ORCID: 0000-0003-3100-1324
Observed ORCID: 0000-0003-3100-1324
OpenAlex ID: A5102915526
A 10 nm FinFET 128 Mb SRAM With Assist Adjustment System for Power, Performance, and Area Optimization
2016 · Taejoong Song, Woojin Rim, et al. · IEEE Journal of Solid-State Circuits · 94
A 7nm FinFET SRAM using EUV lithography with dual write-driver-assist circuitry for low-voltage applications
2018 · Taejoong Song, Jonghoon Jung, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 77
Positive and negative tone double patterning lithography for 50nm flash memory
2006 · Chang-Moon Lim, Seo-Min Kim, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 54
17.1 A 10nm FinFET 128Mb SRAM with assist adjustment system for power, performance, and area optimization
2016 · Taejoong Song, Woojin Rim, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 42
Issues and challenges of double patterning lithography in DRAM
2007 · Seo-Min Kim, Sun-Young Koo, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 30
12.2 A 7nm FinFET SRAM macro using EUV lithography for peripheral repair analysis
2017 · Taejoong Song, Hoonki Kim, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 23
Determination and Quantification of Heavy Metals in Sediments through Laser-Induced Breakdown Spectroscopy and Partial Least Squares Regression
2021 · Sangmi Yoon, Jaeseung Choi, et al. · Applied Sciences · 20
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24.3 A Voltage and Temperature Tracking SRAM Assist Supporting 740mV Dual-Rail Offset for Low-Power and High-Performance Applications in 7nm EUV FinFET Technology
2019 · Inhak Lee, Hanwool Jeong, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 14
Snap-3D: A Constrained Placement-Driven Physical Design Methodology for High Performance 3-D ICs
2022 · Pruek Vanna-Iampikul, Chengjia Shao, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 12
Design and Development of High-Repetition-Rate Satellite Laser Ranging System
2015 · Eun-Jung Choi, Seong-Cheol Bang, et al. · Journal of Astronomy and Space Sciences · 12
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A 14nm 128Mb Embedded MRAM Macro achieved the Best Figure-Of-Merit with 80MHz Read operation and 18.1Mb/mm² implementation at 0.64V
2023 · Gyuseong Kang, Hyunjin Shin, et al. · IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 11
Improving the Analysis of Sulfur Content and Calorific Values of Blended Coals with Data Processing Methods in Laser-Induced Breakdown Spectroscopy
2022 · Jae Seung Choi, Choong Mo Ryu, et al. · Applied Sciences · 8
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OPC model accuracy study using high volume contour based gauges and deep learning on memory device
2019 · Young-Seok Kim, Seil Lee, et al. · Metrology, Inspection, and Process Control XXXVI · 6
Development of Operation Software for High Repetition rate Satellite Laser Ranging
2016 · Ki-Pyoung Sung, Eun-Jung Choi, et al. · Journal of the Korean Society for Aeronautical & Space Sciences · 6
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Evaluation of inverse lithography technology for 55nm-node memory device
2008 · Byung-ug Cho, Sung-woo Ko, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 6
New OPC verification method using die-to-database inspection
2006 · Hyunjo Yang, Jaeseung Choi, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 6
A 28nm Embedded Flash Memory with 100MHz Read Operation and 7.42Mb/mm2 at 0.85V featuring for Automotive Application
2021 · Hyunjin Shin, Myeonghee Oh, et al. · Symposium on VLSI Circuits · 5
OPC accuracy enhancement through systematic OPC calibration and verification methodology for sub-100nm node
2005 · Hyunjo Yang, Jaeseung Choi, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 5
Cost effective solution using inverse lithography OPC for DRAM random contact layer
2017 · Jinhyuck Jun, Jaehee Hwang, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 4
5nm Low Power SRAM Featuring Dual-Rail Architecture with Voltage-Tracking Assist Circuit for 5G mobile application
2021 · Sangyeop Baeck, Inhak Lee, et al. · Symposium on VLSI Circuits · 3
CAS 500-1/2 Image Utilization Technology and System Development: Achievement and Contribution
2020 · Sung-Joo Yoon, Jong-Hwan Son, et al. · National Remote Sensing Bulletin · 3
5-nm Low-Power SRAM Featuring Dual-Rail Architecture With Voltage-Tracking Assist Circuit for 5G Mobile Application
2022 · Sangyeop Baeck, Inhak Lee, et al. · IEEE Solid-State Circuits Letters · 2
DFM flow by using combination between design based metrology system and model based verification at sub-50nm memory device
2007 · Cheol-kyun Kim, Jungchan Kim, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 1
Highly accurate modeling by using 2-dimensional calibration data set for model-based OPC verification
2006 · Cheol-kyun Kim, Jae-Seung Choi, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 1
Considerations of model-based OPC verification for sub-70nm memory device
2006 · Cheol-Kyun Kim, Jae-Seung Choi, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 1
Works count: 41
Citation count: 447
H-index: 11
I10-index: 11
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