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Yu-Der Chih

Observed names: Chih Yu-Der, Chih Yue-Der, Yu-De Chih, Yue-Der Chih, YueDer Chih, Yue‐Der Chih
OpenAlex ID: A5109491324
16.4 An 89TOPS/W and 16.3TOPS/mm2 All-Digital SRAM-Based Full-Precision Compute-In Memory Macro in 22nm for Machine-Learning Edge Applications
2021 · Yu-Der Chih, Po-Hao Lee, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 388
A 5-nm 254-TOPS/W 221-TOPS/mm2 Fully-Digital Computing-in-Memory Macro Supporting Wide-Range Dynamic-Voltage-Frequency Scaling and Simultaneous MAC and Write Operations
2022 · Hidehiro Fujiwara, Haruki Mori, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 231
16.1 A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edge Devices
2021 · Cheng-Xin Xue, Je-Min Hung, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 183
A CMOS-integrated compute-in-memory macro based on resistive random-access memory for AI edge devices
2020 · Cheng-Xin Xue, Yen-Cheng Chiu, et al. · Nature Electronics · 179
19.4 embedded 1Mb ReRAM in 28nm CMOS with 0.27-to-1V read using swing-sample-and-couple sense amplifier and self-boost-write-termination scheme
2014 · Meng-Fan Chang, Jui-Jen Wu, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 149
Fusion of memristor and digital compute-in-memory processing for energy-efficient edge computing
2024 · Tai-Hao Wen, Je-Min Hung, et al. · Science · 132
An 8-Mb DC-Current-Free Binary-to-8b Precision ReRAM Nonvolatile Computing-in-Memory Macro using Time-Space-Readout with 1286.4-21.6TOPS/W for Edge-AI Devices
2022 · Je-Min Hung, Yen-Hsiang Huang, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 126
An N40 256K×44 embedded RRAM macro with SL-precharge SA and low-voltage current limiter to improve read and write performance
2018 · Chung-Cheng Chou, Zheng-Jun Lin, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 118
A four-megabit compute-in-memory macro with eight-bit precision based on CMOS and resistive random-access memory for AI edge devices
2021 · Je-Min Hung, Cheng-Xin Xue, et al. · Nature Electronics · 117
A 4nm 6163-TOPS/W/b $\mathbf{4790-TOPS/mm^{2}/b}$ SRAM Based Digital-Computing-in-Memory Macro Supporting Bit-Width Flexibility and Simultaneous MAC and Weight Update
2023 · Haruki Mori, Wei-Chang Zhao, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 114
13.3 A 22nm 32Mb Embedded STT-MRAM with 10ns Read Speed, 1M Cycle Write Endurance, 10 Years Retention at 150°C and High Immunity to Magnetic Field Interference
2020 · Yu-Der Chih, Yi-Chun Shih, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 104
A 22nm 4Mb STT-MRAM Data-Encrypted Near-Memory Computation Macro with a 192GB/s Read-and-Decryption Bandwidth and 25.1-55.1TOPS/W 8b MAC for AI Operations
2022 · Yen-Cheng Chiu, Chia-Sheng Yang, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 98
An Offset-Tolerant Fast-Random-Read Current-Sampling-Based Sense Amplifier for Small-Cell-Current Nonvolatile Memory
2013 · Meng-Fan Chang, Shin-Jang Shen, et al. · IEEE Journal of Solid-State Circuits · 98
A 12nm 121-TOPS/W 41.6-TOPS/mm2 All Digital Full Precision SRAM-based Compute-in-Memory with Configurable Bit-width For AI Edge Applications
2022 · Chia-Fu Lee, Cheng-Han Lu, et al. · IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) · 91
A 1Mb 28nm STT-MRAM with 2.8ns read access time at 1.2V VDD using single-cap offset-cancelled sense amplifier and in-situ self-write-termination
2018 · Qing Dong, Zhehong Wang, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 91
29.1 A 40nm 64Kb 56.67TOPS/W Read-Disturb-Tolerant Compute-in-Memory/Digital RRAM Macro with Active-Feedback-Based Read and In-Situ Write Verification
2021 · Jong-Hyeok Yoon, Muya Chang, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 85
A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time
2012 · Meng-Fan Chang, Che-Wei Wu, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 85
A Nonvolatile Al-Edge Processor with 4MB SLC-MLC Hybrid-Mode ReRAM Compute-in-Memory Macro and 51.4-251TOPS/W
2023 · Wei-Hsing Huang, Tai-Hao Wen, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 80
A CMOS-integrated spintronic compute-in-memory macro for secure AI edge devices
2023 · Yen-Cheng Chiu, Win-San Khwa, et al. · Nature Electronics · 79
34.4 A 3nm, 32.5TOPS/W, 55.0TOPS/mm 2 and 3.78Mb/mm 2 Fully-Digital Compute-in-Memory Macro Supporting INT12 × INT12 with a Parallel-MAC Architecture and Foundry 6T-SRAM Bit Cell
2024 · Hidehiro Fujiwara, Haruki Mori, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 76
A mixed-precision memristor and SRAM compute-in-memory AI processor
2025 · Win-San Khwa, Tai-Hao Wen, et al. · Nature · 75
8-b Precision 8-Mb ReRAM Compute-in-Memory Macro Using Direct-Current-Free Time-Domain Readout Scheme for AI Edge Devices
2022 · Je-Min Hung, Tai-Hao Wen, et al. · IEEE Journal of Solid-State Circuits · 75
34.8 A 22nm 16Mb Floating-Point ReRAM Compute-in-Memory Macro with 31.2TFLOPS/W for AI Edge Devices
2024 · Tai-Hao Wen, Hung-Hsi Hsu, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 74
A 40-nm 118.44-TOPS/W Voltage-Sensing Compute-in-Memory RRAM Macro With Write Verification and Multi-Bit Encoding
2022 · Jong-Hyeok Yoon, Muya Chang, et al. · IEEE Journal of Solid-State Circuits · 71
33.1 A 16nm 32Mb Embedded STT-MRAM with a 6ns Read-Access Time, a 1M-Cycle Write Endurance, 20-Year Retention at 150°C and MTJ-OTP Solutions for Magnetic Immunity
2023 · Po-Hao Lee, Chia-Fu Lee, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 70
Works count: 163
Citation count: 4,878
H-index: 39
I10-index: 82
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