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Joe Ko

A new on-chip ESD protection circuit with dual parasitic SCR structures for CMOS VLSI
1992 · Chung-Yu Wu, Ming-Dou Ker, et al. · IEEE Journal of Solid-State Circuits · 17
Investigation of DC Hot-Carrier Degradation at Elevated Temperatures for n-Channel Metal–Oxide–Semiconductor Field-Effect-Transistor of 0.13 µm Technology
2006 · Jung-Chun Lin, Shuang-Yuan Chen, et al. · Japanese Journal of Applied Physics · 13
Temperature Effects on the Hot-Carrier Induced Degradation of pMOSFETs
2006 · Shuang-yuan Chen, Chia-hao Tu, et al. · IEEE International Integrated Reliability Workshop final report · 8
The switch of the worst case on NBTI and hot-carrier reliability for 0.13μm pMOSFETs
2008 · Chia-Hao Tu, Shuang-Yuan Chen, et al. · Applied Surface Science · 7
Investigation of DC Hot-Carrier Degradation at Elevated Temperatures for p-Channel Metal–Oxide–Semiconductor Field-Effect Transistors of 0.13 µm Technology
2008 · Shuang-Yuan Chen, Chia-Hao Tu, et al. · Japanese Journal of Applied Physics · 7
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Optimized ONO thickness for multi-level and 2-bit/cell operation for wrapped-select-gate (WSG) SONOS memory
2007 · Woei-Cherng Wu, Tien-Sheng Chao, et al. · Semiconductor Science and Technology · 4
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Mismatches after Hot-Carrier Injection in Advanced Complementary Metal–Oxide–Semiconductor Technology Particularly for Analog Applications
2006 · Shuang-Yuan Chen, Jung-Chun Lin, et al. · Japanese Journal of Applied Physics · 4
The Effect of Etch Stop Layer Stress on Negative Bias Temperature Instability of Deep Submicron p-MOSFETs
2007 · Ming Shing Chen, Y. K. Fang, et al. · International Conference on Solid State Devices and Materials (SSDM) · 3
Charge Loss Due to AC Program Disturbance Stresses in EPROMs
1993 · Jyh-Kuang Lin, Chun-Yen Chang, et al. · Japanese Journal of Applied Physics · 3
Temperature dependence of substrate currents of MOSFETs under different drain and gate biases
2011 · Chuan-Hsi Liu, Shuang-Yuan Chen, et al. · Journal of the Chinese Institute of Engineers · 1
Effect of Etch Stop Layer Stress on Negative Bias Temperature Instability of Deep Submicron p-Type Metal–Oxide–Semiconductor Field Effect Transistors with Dual Gate Oxide
2008 · Ming-Shing Chen, Yean-Kuen Fang, et al. · Japanese Journal of Applied Physics · 1
On the reverse short‐channel effect and threshold voltage roll‐off controls for 90 nm node MOSFETs
2007 · Shuang‐Yuan Chen, Chia‐Hao Tu, et al. · Journal of the Chinese Institute of Engineers · 1
A Study on Tunneling Current of ONO Films and Data Retention Effects in Flash Memories
2004 · Shuang‐Yuan Chen, Heng‐Sheng Huang, et al. · Journal of Applied Science and Engineering · 1
A New Drain Engineering Structure-SCD-LDD (Surface Counter Doped LDD) for Improved Hot Carrier Reliability
1993 · Jih Wen Chou, Chun Yun Chang, et al. · Japanese Journal of Applied Physics · 1
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A Highly Reliable Multi-level and 2-bit/cell Operation of Wrapped-Select-Gate (WSG) SONOS Memory with Optimized ONO Thickness
2007 · Woei-Cherng Wu, Tien-Sheng Chao, et al. · International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA)
New Large Angle Tilt Implanted Drain Structure: Surface Counter-Doped-Lightly Doped Drain for High Hot Carrier Reliability
1994 · Jih Wen Chou, Chun Yun Chang, et al. · Japanese Journal of Applied Physics
Works count: 16
Citation count: 71
H-index: 5
I10-index: 2
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