Get started
Author

Butchi Babu Sarnala

Institution: VIT-AP University
Observed institution: VIT-AP University
ORCID: 0009-0000-5623-0284
Observed ORCID: 0009-0000-5623-0284
OpenAlex ID: A5117076256
High-speed convolutional neural networks using parallel prefix adders
2025 · Butchi Babu Sarnala, Siva Ramakrishna Pillutla · AEU - International Journal of Electronics and Communications · 4
A Fully Pipelined Reconfigurable Max–Average Pooling Architecture for FPGA-Based CNN Accelerators
2026 · Butchi Babu Sarnala, Siva Ramakrishna Pillutla · IEEE International Conference on Interdisciplinary Approaches in Technology and Management for Social Innovation (IATMSI) · 1
A reconfigurable architecture for CNN acceleration using line buffers
2026 · Butchi Babu Sarnala, Siva Ramakrishna Pillutla · Scientific Reports
PDF
Efficient Implementation of Convolutional Neural Networks in FPGA Using approximate ripple carry adders
2025 · Butchi Babu Sarnala, Siva Ramakrishna Pillutla · International Conference on Signal Processing, Computation, Electronics, Power and Telecommunication (IConSCEPT)
Works count: 4
Citation count: 5
H-index: 1
I10-index:
Year
Topic
Type