Work

Static low power verification at transistor level for SoC design

Year: 2012

Type: conference-paper

Source: International Symposium on Low Power Electronics and Design (ISLPED)

DOI: 10.1145/2333660.2333694

Authors: Jérôme Lescot, Vincent Bligny, Dina Medhat, Didier Chollat-Namy, Ziyang Lu, Sophie Billy, Mark Hofmann

Institution: Mentor Graphics (United States)

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W1986844197

FWCI: 0.768

Cites: 9

Cited by: 13

Related to: 10