Work

Layout-aware Illinois Scan design for high fault coverage coverage

Year: 2010

Type: conference-paper

Source: International Symposium on Quality Electronic Design (ISQED)

DOI: 10.1109/isqed.2010.5450501

Authors: S. Banerjee, J. Mathew, D. K. Pradhan, S. P. Mohanty

Institutions: University of Bristol, University of North Texas

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2039445796

FWCI: 0.539

Cites: 23

Cited by: 7

Related to: 10