Work

Test time reduction methods for yield test structures

Year: 2003

Type: conference-paper

Source: IEEE International Conference on Microelectronic Test Structures (ICMTS)

DOI: 10.1109/icmts.2003.1197384

Authors: C. Hess, H. Read, J. Ren, L.H. Weiland, Jianjun Cheng, Chock Gan, H. Karbasi, S. Winters

Institution: PDF Solutions (United States)

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W2103901791

FWCI:

Cites: 3

Cited by: 6

Related to: 10