Control of application specific interconnection on gate arrays using an active checkerboard test structure
Year: 2005
Type: conference-paper
Authors: C. Hess, L.H. Weiland, G. Lau, P. Simoncit
Institution: Karlsruhe Institute of Technology
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W2168821131
